Tuesday, September 5, 2017

Kerala PSC HSST Computer Science Previous Questions - Set 1

Answers given at the end.

Q1. The size of an ATM cell is .............. bytes.
(A) 25
(B) 32
(C) 53
(D) 64

Q2. Stored program concept is attributed to:
(A) Ken Thompson
(B) Dennis Ritchie
(C) Von Neumann
(D) Edsger Dijkstra

Q3. In a UNIX system, the macro htons is used to:
(A) Convert a short number from host to network order
(B) Convert a long number from host to network order
(C) Convert a short number from network to host order
(D) Convert a long number from network to host order

Q4. The cache which is on the same chip as the processor is called :
(A) L1
(B) L2
(C) L3
(D) None of these

Q5. Which IEEE standard is refers to fast Ethernet?
(A) 802.1
(B) 802.3b                  
(C) 802.3u
(D) 802.12

Q6. Which level of RAID uses mirroring to achieve redundancy?
(A) 0
(B) 1
(C) 2
(D) 3

Q7. The new generation Intel processor with the IA-64 architecture is called
(A) Itanium
(B) Pentium 4
(C) Athlon
(D) Xeon

Q8. A MAC address is ............. bytes long:
(A) 4
(B) 6
(C) 8
(D) 12

Q9. RARP is used to convert:
(A) IP address to MAC address
(B) MAC address to IP address
(C) IP address to port number
(D) Port number to IP address

Q10. Which among the following is an NP-Complete problem?
(A) 3SAT Problem
(B) Travelling Salesman
(D) Graph 3-coloring
(D) All of the above

ANSWERS

Q1: (C)
Asynchronous transfer mode (ATM) was designed for a network that must handle both traditional high-throughput data traffic (e.g., file transfers), and real-time, low-latency content such as voice and video. An ATM cell consists of a 5-byte header and a 48-byte payload - total 53bytes. ATM defines two different cell formats: User–network interface (UNI) and Network-to-network interface (NNI).
Ref: https://en.wikipedia.org/wiki/Asynchronous_Transfer_Mode

Q2: (C)
Stored program concept: The fundamental computer architecture in which the computer acts upon (executes) internally stored instructions. The idea was introduced in the late 1940s by John von Neumann, who proposed that a program be electronically stored in binary-number format in a memory device so that instructions could be modified by the computer as determined by intermediate computational results. engineers in England built the first stored-program computer, the Manchester Mark I, shortly before the Americans built EDVAC, both operational in 1949.
Ref: https://www.britannica.com/technology/stored-program-concept

Q3: (A)
Ref: https://linux.die.net/man/3/htons

Q4: (A)
CPU caches are small pools of memory that store information the CPU is most likely to need next. he goal of the cache system is to ensure that the CPU has the next bit of data it will need already loaded into cache by the time it goes looking for it (also called a cache hit).
A cache miss, on the other hand, means the CPU has to go scampering off to find the data elsewhere. This is where the L2 cache comes into play — while it’s slower, it’s also much larger. Some processors use an inclusive cache design (meaning data stored in the L1 cache is also duplicated in the L2 cache) while others are exclusive (meaning the two caches never share data). If data can’t be found in the L2 cache, the CPU continues down the chain to L3 (typically still on-die), then L4 (if it exists) and main memory (DRAM).
Ref: https://www.extremetech.com/extreme/188776-how-l1-and-l2-cpu-caches-work-and-why-theyre-an-essential-part-of-modern-chips

Q5: (C)
Fast Ethernet is a local area network (LAN) transmission standard that provides a data rate of 100 megabits per second (referred to as "100BASE-T").

Q6: (B)
RAID (redundant array of independent disks) is a data storage virtualization technology that combines multiple physical disk drive components into a single logical unit for the purposes of data redundancy, performance improvement, or both.
Ref: https://en.wikipedia.org/wiki/RAID

Q7: (A)
IA-64 (also called Intel Itanium architecture) is the instruction set architecture (ISA) of the Itanium family of 64-bit Intel microprocessors.

Q8: (B)
A media access control address (MAC address) of a computer is a unique identifier assigned to network interfaces for communications at the data link layer of a network segment. MAC address consists of 48 bits.

Q9: (B)
The Reverse Address Resolution Protocol (RARP) is an obsolete computer networking protocol used by a client computer to request its Internet Protocol (IPv4) address from a computer network, when all it has available is its MAC address. It has been rendered obsolete by the Bootstrap Protocol (BOOTP) and the modern Dynamic Host Configuration Protocol (DHCP), which both support a much greater feature set than RARP.
Ref: https://en.wikipedia.org/wiki/Reverse_Address_Resolution_Protocol

Q10: (D)
NP complete problems are problems whose status is unknown. No polynomial time algorithm has yet been discovered for any NP complete problem, nor has anybody yet been able to prove that no polynomial-time algorithm exist for any of them.
Ref: http://www.geeksforgeeks.org/np-completeness-set-1/

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